Integrated circuit microprocessors or CPUs are typically designed for worst-case conditions that may include parameters that are critical to the VLSI design, such as frequency, power, voltage, current, and temperature. Some integrated circuit and CPU designs assume a standard set of conditions that require guard-banding. In these designs, the allowable operating conditions for the CPU are set so that the CPU design limits cannot be reached. For example, although a processor is capable of operating at 130 Watts under normal operating conditions, it may be guard-banded and hence specified to operate at 100 Watts to prevent the processor from exceeding the design limit.
In some designs, processors monitor a particular error condition and operate so as to not exceed that parameter. For example, a temperature measurement circuit having a trip point is used to notify the processor of a thermal problem. Such thermal monitoring circuits typically monitor only a single location on the processor's integrated circuit. As a result, unmonitored sections of the integrated circuit may be operating at temperatures exceeding the design limits or those sections may be operating at a temperature well below the design limit when a monitored section trips the thermal warning. This type of thermal monitoring is not efficient and does not allow the processor to operate at optimal conditions.
In other designs, the processor is characterized across all operating conditions to determine a worse-case power or frequency value. The processor is then limited or guard-banded to this worst-case condition, which may occur only under rarely used conditions. This prevents the processor from using more efficient power values and frequencies during typical operations.
The prior art solutions using guard-banding or external monitoring circuits are incapable of controlling the VLSI environment of the processor. Prior art circuits for monitoring discrete variables do not communicate with each other and, therefore, do not provide for VLSI parameter optimization across multiple variables. Additionally, such discrete circuits offer limited recourse to correct typical CPU problems such as high operating temperatures or high system power. For example, a prior art solution may provide a thermal trip circuit that completely disables a processor if an excessively high temperature is reached. This solution would be incapable of providing graceful performance throttling under such conditions.